Abstract

Silicon oxide capacitors have been developed on micromodule wafers (0.310-in. sq. with three termination notches per side). Each microelement contains 1, 2, 3, or 4 capacitors with values of 1120 and 560, 180, 100 and 68 pf per capacitor, respectively. The 1120 pf capacitor is double layered. In addition to the general requirements of microelements and micromodules, some of the more important specifications these capacitors must meet are: dissipation factor (DF) not exceeding 0.015, insulation resistance (IR) at 50 volts exceeding 10,000 megohms (25°C) and 750 megohms (125°c), 50 WVDC and 150 volts dielectric withstanding voltage (DWV), Δ C not exceeding + 15% (−55° to 125°C), no breakdown during or after a short term life test of 72 hours at 125°C while stressed at 150 volts, and a long term life test of 2000 hours at 125°C and 100 volts after which DF should not exceed 0.03 and IR should exceed 3000 megohms (room temperature) and be not less than 500 megohms (125°C). The capacitors are non-polar with vacuum deposited A1 electrodes and silicon oxide (largely monoxide) dielectric. They are fabricated in a microcircuit jig that processes 32 microelements simultaneously and 192 microelements during one vacuum cycle. Both the A1 and SiO are deposited at the monitored and controlled rate of 50 Å/sec. The thicknesses of electrodes and dielectric are 5000 and 12,500, respectively. Wafer temperature during deposition is about 170°C and chamber pressure is 1−4x10⁻⁴ torr during A1 evaporation, and 0.6−1 x 10⁻⁴ torr during SiO evaporation. The SiO evaporator design is important; a baffled Ta box has proven satisfactory. Deposition masks were made from 0.005-in. spring steel by photoresist techniques. Capacitors deposited on unglazed alumina wafers had DF readings of approximately 0.3; undercoating with SiO or polishing the wafers did not prove effective in reducing the DF appreciably. Glazing the alumina prior to capacitor deposition lowered the DF to about 0.04. Two approaches to glazed elements were equally successful: (1) a glass frit fired onto an unglazed, metallized wafer; (2.) metallizing - applied to a glazed wafer. The second approach has been adopted. Capacitance is uniform to within ±5% and DF to within ± 10%. It was found that heat treatment in air at 250°C for at least 48 hours lowered the DE to less than 0.008, lowered the capacitance by about 10%, and increased IR to over 10,000 megohms without causing detrimental electrode-land reactions. Presumably, oxygen diffuses into the dielectric converting it to SiOₓ(1 < x < 2) and lowering its dielectric constant. The units are very stable, maintaining their capacitance, DF, and DWV values for months while stored at 25°C in ambient atmosphere.

Notes

Originally published in IEEE Trans. on Parts, Materials and Packaging, 1965, pp.186-193 June 1965. doi: 10.1109/TPMP.1965.1135349

Keywords

silicon oxide capacitors

Disciplines

Industrial Engineering | Mechanical Engineering

Publisher

IEEE

Publication Date

1965

Rights Information

© 1965 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other users, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works for resale or redistribution to servers or lists, or reuse of any copyrighted components of this work in other works.

Rights Holder

IEEE

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