Advisor(s)
Mehdi B. Tahoori
Contributor(s)
David R. Kaeli, Ningfang Mi
Date of Award
1-2011
Date Accepted
1-2011
Degree Grantor
Northeastern University
Degree Level
Ph.D.
Degree Name
Doctor of Philosophy
Department or Academic Unit
College of Engineering. Department of Electrical and Computer Engineering.
Keywords
Error Recovery, Field Analysis, Online Error Detection, SER Estimation, Soft Errors, Transient Errors
Disciplines
Electrical and Computer Engineering | Engineering
Abstract
Soft errors, due to cosmic radiations, are a major reliability barrier for VLSI designs. The vulnerability of such systems to soft errors grows exponentially with technology scaling. To meet reliability constraints in a cost-effective way, it is critical to assess soft error reliability parameters in early design stages in order to optimize reliability in the entire design cycle. Unlike soft error modeling for gate-level netlists, soft error propagation models for high level behavioral designs are not straightforward. We divide the work done into three parts. First, the Soft Error Rate (SER) computation problem is modeled as a Boolean Satisfiability (SAT) problem and SAT solvers are used to compute SER for combinational and sequential circuits. SAT is also used to compute a metric called Hardware Vulnerability Factor (HVF). HVF is the probability that an error in any bit of the internal processor structure will result in an error in a program visible state. The HVF computation problem is transformed into an equivalent Boolean satisfiability problem and state-of-the-art SAT solvers are used to obtain HVF for a 5-stage MIPS pipeline. Next, several schemes are proposed for detecting, correcting and recovering from soft errors in processor pipelines. Two types of pipelines are considered. One is a simple 5-stage MIPS pipeline, while the other is a superscalar pipeline similar to the ALPHA processor. Lastly, a case study involving thousands of high availability systems is presented. The study considers, soft errors occurring in the processors used in these systems.
Document Type
Dissertation
Rights Information
Copyright 2011
Rights Holder
Syed Zafar Shazli
Permanent URL
Recommended Citation
Shazli, Syed Zafar, "High level modeling and mitigation of transient errors in nano-scale systems" (2011). Electrical Engineering Dissertations. Paper 47. http://hdl.handle.net/2047/d20002793
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